//==========================================================================
// Copyright (c) 2000-2008,  Elastos, Inc.  All Rights Reserved.
//==========================================================================
/* tvia 2010 driver
 */
#ifndef _TVIA_2010_H_
#define _TVIA_2010_H_

#define LINEAR_MEMORY  1

#define  TVOUT   0

#define  ON   1
#define  OFF  0

typedef   unsigned char  BYTE_;     /*8 bits*/
typedef   unsigned short WORD_;     /*16 bits*/
typedef   unsigned long  DWORD_;    /*32 bits*/

#define bpVidMemPtr (BYTE_ *) dwLINEAR_BASE

/*--------------------------------------------------------------- -------
  Part II - I/O access
  ------------------------------------------------------------------ ----*/

/* Note: R - readable, W - Writable, R/W - read/writable */
#define   PORT46E8     0x46E8 /* R   */
#define   PORT102      0x102  /* R/W */
#define   MISCREAD     0x3CC  /* R   */
#define   MISCWRITE    0x3C2  /* W   */
#define   SEQINDEX     0x3C4  /* R/W */
#define   SEQDATA      0x3C5  /* R/W */
#define   CRTINDEX     0x3D4  /* R/W */
#define   CRTDATA      0x3D5  /* R/W */
#define   ATTRRESET    0x3DA  /* R/W */
#define   ATTRINDEX    0x3C0  /* R/W */
#define   ATTRDATAW    0x3C0  /* W, Attrib write data port */
#define   ATTRDATAR    0x3C1  /* R, Attrib read data port  */
#define   GRAINDEX     0x3CE  /* R/W */
#define   GRADATA      0x3CF  /* R/W */
#define   RAMDACMASK   0x3C6  /* R/W, Mask register */
#define   RAMDACINDEXR 0x3C7  /* R/W, RAM read index port  */
#define   RAMDACINDEXW 0x3C8  /* R/W, RAM write index port */
#define   RAMDACDATA   0x3C9  /* R/W, RAM Date port */
#define   IGS3CEINDEX  0x3CE  /* R/W */
#define   IGS3CFDATA   0x3CF  /* R/W */
#define   IGS3D4INDEX  0x3D4  /* R/W */
#define   IGS3D5DATA   0x3D5  /* R/W */
#define   IGS3C4INDEX  0x3C4  /* R/W */
#define   IGS3C5DATA   0x3C5  /* R/W */

/*mode */

#define   SEQCOUNT  0x05
#define   MISCCOUNT 0x01
#define   CRTCOUNT  0x19
#define   ATTRCOUNT 0x15
#define   GRACOUNT  0x9
#define   EXTPARTIALCOUNT 8 /* define 8 extended regs for color depth change */

#define   SREGCOUNT SEQCOUNT+MISCCOUNT+CRTCOUNT+ATTRCOUNT+GRACOUNT
#define   EREGCOUNT EXTPARTIALCOUNT * 2 + 1

typedef struct _StandardRegs
{
    BYTE_ VGARegs[SREGCOUNT];
} StandardRegs;

typedef struct _ExtendedRegs
{
    BYTE_ IGSRegs[EREGCOUNT];
} ExtendedRegs;

typedef struct _ModeInit
{
    StandardRegs *bpStdReg;  /*VGA standard registers*/
    ExtendedRegs *bpExtReg;  /*IGS extended registers*/
} ModeInit;

typedef enum {
    MODE_640x480x8x60,    /* 6*/
    MODE_640x480x16x60,
    MODE_800x600x16x50,   /*25*/

    MODE_800x600x16x75,   /*28*/

    TOTAL_MODES
} MODEID;

struct sModeParam
{
    MODEID     wModeID;        /*Mode ID*/
    WORD_      wTVOn;          /*Turn ON/OFF TV DAC*/
    WORD_      wCRTOn;         /*Turn ON/OFF CRT DAC*/
    WORD_      wScartTVOn;     /*Turn ON/OFF Scart TV setting*/
    WORD_      wPCIBurstOn;    /*Turn ON/OFF PCI burst mode*/
};

/*Normal*/
extern ModeInit Mode_640x480x8_60Hz;
extern ModeInit Mode_640x480x16_60Hz;
extern ModeInit Mode_800x600x16_50Hz;
extern ModeInit Mode_800x600x16_75Hz;

#endif /*_TVIA_2010_H_*/
